Frequency divider



Oct. 16, 1956 Y C. C. MARTINELHLI FREQUENCY DIVIDER Filed March 28, 1952lllllllfvnllll.

2 Sheets-Sheet l Oct. 16, 1956 c. c. MARTINELLI 2,767,313

FREQUENCY DIV-IDER Filed March 28, 1952 2 sheets-sheet 2.

007/207 aF f A e :frown/ffii 0. Z-

l f2 I ATToaNEY United States Patent ce m6, 12,7312

utilized is of the type shown and described in patent to E. L. C. White,Patent No. 2,113,011, for Thermionic Valve Apparatus, issued April 5,1938. In this type of 2,767,313 counter, pulses to be counted areapplied to a storage FREQUENCY DIVIDER 5 capacitor through a diode tocharge thefcapacitor in steps.

, When a predetermined charge, corresponding to a prede- Ciro C.Martinelli, Princeton, N, J., assignor to Radio termined count, has beenaccumulated on the capacitor, a Corporation f America a Corporation 0fDelaware discharge device, such as a blocking oscillator, is tripped lto provide an indication of the count and to discharge Appl-manon March28 1952 Semi No' 279130 10 the capacitor to make it available for a newcount.

7 Claims, (Cl. Z50-27) The specific energy storage step counter utilizedis of the improved type described in patent to Luclg, Patent No.2,563,123. The feature ofV this energy storage step v counter is that itis not adversely affected by power sup- This invention relates topredetermined counters and, l ply variations.

more particularly, is an improved predetermined counter A sensing and acoincidence tube pair are provided for type of frequency dividerutilizing energy storage step each counter. Each pair has a commoncathode bias counters. resistor to which the cathode of'each tube isconnected.

In Patent No. 2,563,123 for Counter Circuit, issued The grid of thesensing tube in the rst pair is coupled August 7, 1951, to D. G. C. Lucket al., there is shown to the output terminal of the binary counter. Thegrids and described an improved electronic predetermined of thecoincidence and sensing tubes of the rst pair are counter system of theenergy storage step type. Such a connected to separate fixed biases andthe common cathcounter is sufficiently stable and accurate for use as aode bias resistor is connected to a selector switch. The frequencydivider designed to provide a submultiple output position of theselector switch determines whether or not frequency which is apredetermined fraction of the input a predetermined binary count is tobe detected. When frequency. For example, this type of frequencydivideradditional one-half steps are not desired, the binary count maybe used in multichannel receivers to provide local is notdetected andthe sensing and coincidence tubes of oscillator frequencies over aplurality of decimally divided the first pair are made inoperative. Theamplitude of the subchannel scales such as: 0-90() kc., 0 9() kc. and0-9 kc. fixed biases connected to the grids of the sensing and coinlnmany applications of such frequency dividers, Vit is cidence tubes inthe firstV pair are determined so that in desirable to divide a givenfrequency scale into additional an operating condition, the sensing tubebecomes alterone-half steps. For example, it may be desirable tosubnately conductive and non-conductive while the coincidivide a 0-9 kc.scale into one-half kc. steps so that it is dence tube becomesalternately non-conductive and conpossible to obtain a submultiplefrequency such as, for eX- dutive in response to alternate, positive andnegative ample, 3,5 kc, it is ngt prag/gal to do this by inmenging 35voltages received from the binary counter. the number of energy storagesteps aSSQCd with the The grid of the coincidence tube of the secondpair and 0-9 kc. scale from 1Q to 20, since the energy storage itscommon cathode bias resistor are each connected to counter tends tobecome unstable as the number of steps separate variable bias supplies.The amplitudes of the is increased. it is possible to solve this problemby addvariable bias supplies are determined so that the sensing inganother energy storage step counter having twosteps. tube connected tothe storage capacitor remains 10.11- Tln's, however, would unnecessarilycomplicate the cir- Conductive and the coincidence tube remainsConductive cuitry. until a predetermined count, when the charge on thelt is an object of the present invention to provide a storage capacitorcauses the sensing tube to become constable frequency divider orpredetermined counter of ductive and the coincidence tube to becomenonthe energy'stcrage step counter type which is designed to 45conductive. The concurrence of non-conduction in the subdivide an inputfrequency into additional one-half two coincidence tubes creates anoutput pulse which fires fractions without additional energy storagestep counter the reset and output pulse circuit. stages. 4 The novelfeatures of the invention as well as the invenit is a further object ofthe present invention to provide tion itself, both as to itsorganization and method of opa novel and improved predetermined counteror frequeneration, will best be understood from the following decydivider which is simple, inexpensive and has a broad scription, whenread in connection with the accompanying counting or frequency dividingrange. drawings in which,

These and other objects of the presentinvention are Figure 1 shows acircuit diagram of an embodiment of achieved by utilizing a binary orscale-.of-two counter and the present invention, an energy storage stepcounter. Input pulses having a fre- Figure.. .2 ASllQVl/S the voltagewave forms which appear quency which is to be subdivided are applied tothe binary. at Various points in the circuit shown in Figure l duringcounter. The binary counter output is applied to the a typicaloperation. energy storage counter. Adjustable rneans are providedReferring 110W t0 Figure i, a signal having a sinusoidal for detecting apredetermined count in the energy stor- Wave shape a and a frequencywhich is to be subdivided age counter and for detecting one of the twobinary is applied to the inputterminals of arst limiter 10 stage.counts. A coincidence circuitv is provided which detects The limiter 10provides a square-wave voltage b having either the occurrence of apredetermined energy storage the saine frequency as the input signal a.The limiter 10. count alone or the coincidence of the predetermined bi1output is then differentiated and applied to a binary nary count and apredetermined energy storage count. counter Ztl. The binary counter 20is responsive only to The` output of the coincidence circuit is appliedto a the negative going portion of the differentiated pulses reset andoutput pulse circuit. This circuit provides the c and it provides asquare-wave output voltage d desired submultiple frequency. Y which hasla frequency equal to one-half of the input In accordance with apreferred embodiment of the insignal freqllQIlCy. The output of thebinary counter 20 vention, the binary counter utilized is a two-.tubenip-flop is applied to a second limiter 39 which provides a squareortrigger circuit; of the general bistable type described wave voltage e.The binary counter 20 output is also in Theory and Applicatfalof, VacuumTubes, by Herapplied toy a. Sensing and coincidence. circuit 40 whichisbett l Reich The basic energy Storage Sten counter more fullyexplained below! The Second. limiter 30 01,11-

stores and adds successive pulses received from the sec ond limiter 30in a storage capacitor 52.

The sensing and coincidence circuit 49V includes two pairs of tubes 41,472. One'pair 41 has a common cathode bias resistor 43. The other pair42, has Va common cathode bias resistor 44. The first or sensing tube 45of the rst pair 41 has its grid 47 connected to the output of the binarycounter 20. The first or sensing tube 46 of the secondzpair has its grid48 coupled to the storage capacitor 52. The cathode bias resistor 43 ofthe iirst pair 41 is connected to a selector switch 60A which has allits oddnumbered positions connected to ground, and has itsevenly-numberedpositions left unconnected. Thus, in

the odd positions of the selectorA switch as, for example,- position 5'shown in Figure 1, the rst tube pair 41 is operative, whereasin theevenly-numbered positions it is not.

The common cathode resistor 44 of the second pair is connected to anadjustable voltage divider 62 which is connected across a voltagesource. This may be considered asV an adjustable bias. The grid 53 ofthe coincidence tube 56 of the second pair 42 is also connected througha grid resistor 54 to an adjustable Voltage divider 64 connected acrossa source of voltage. The two adjustable biases 62, 64 and the selectorswitch 60 are ganged so that they are .simultaneously adjustable.Therbiases are adjusted so that the sensing or irst tube 46 of thesecond pair 42 is non-conductive and the coincidence or second tube 56conductive until a desired count or number of pulses has been impressedupon the energy storage step counterV 56 at which time the voltage onthe storage capacitor 52 overcomes the bias preventing the sensing tubeof the second pair from conducting.V The sensing tube 46 then becomesconductive and the cathode applied bias thereupon renders thecoincidence tube S6 non-conductive. This switching action betweensensing and coincidence tubes in a pair is further aided by a couplingbetween the anode of the sensing tube and the grid of the coincidencetube which includes a resistor and a capacitor connected in shunt. v

In evenly-numbered positions of the selector switch and the gangedbiases, the first tube pair is inoperative and the energy storage stepcounter of the circuit functions in the same mannerk described in thepatent to Luck et al. The ganged adjustable biases may be adjusted sothat any one of l() counts may be selected to switch conduction from thecoincidence to the sensing tube.VY In the oddlynumbered positions, therst tube pair Vis operative and the circuit functions in a novel mannerto make it possible to frequency divide by 2O diierent factors insteadof 10.

Y Figure l whenrthe ganged switches and biases are in the 5V position.This, as will be more fully explained, provides a frequency division of5.

' A sinusoidal voltage having a wave form a is applied to the firstlimiter 10 input. The first limiter 10 provides. a square-wave `outputvoltage having a wave form b. The square wave voltage of the iirstlimiter 10 output is differentiated to provide a voltage having a waveform c which is applied to the binary counter input. VThe negativepulses of the input voltage are effective through separate rectiiers 'totrigger the binary counter 20 alternately from one of its counts to theother. The binary counter 20 provides a square-voltage d which appearsregular until the fth count when, as will be explained, the binarycounter is reset. The binary counter 20 output is applied to the secondlimiter 30 which has an output hav-V ing a voltage wave shape e which is180 degrees out of phase with the binary counter output voltage. -Thesec-V j counter output. Whenever the binary counter output goes Yondlimiter 30 output is applied to the energy storage step counter"50 andcauses the storage capacitor 52 to charge according to acount-representing voltage f. This appears as the well-known staircasevoltage characteristic of energy storage counters until reset occurs atVpoint 5. The binary counter 23 output is also applied to the input ofthe sensing tube 45 of the first pair of tubes. When the binary outputgoes positive, the sensing tube 45 conducts and cuts off conduction inthe associated coincidence tube 55. As a result, the voltage wave shapeg at the coincidence tube 55 output of the first pair has the same shapeas the voltage wave shape d ofthe binary positive, the coincidencetube.55 of the first pair is put in a zero current condition. Thestair-case voltage f is applied to the sensing tube 46 of the secondpair. With the adjustable biases in the 5 position, the sensing tube 46does not become conductive until two pulses have been stored by thestorage capacitor 52. This corresponds to a count of two in the energystorage step counter 50 andY shows the occurrence of four input pulsesor cycles.V When the sensing tube 46 becomes conductive the associatedcoincidence tube 56 becomes non-conducting. The

' output of the coincidence tube 56 of the second pair has V form j.

pages 333 `and 334. .I Y

From the foregoing description, it will be readily apa voltage waveshape h which shows a count detecting or zero current condition after aneven count which is one less than the'particular count selected, orspeciiically after four pulses have been counted. The ouput of the twocoincidence tubes 55 and 56 is derived from a common anode load resistor,'70 which is connected toV B+. Itis only when both coincidence tubesare in a detecting or zero current condition that an output shown bywaveshape is derived and applied to the reset and output pulse circuit80. The point of this occurrence can be found by observing the combinedoutput of the two coincidence tubes as shown by the voltage wave form z.It can be seen that the voltage wave form'z provides coincidence pulsesat the desired position 5. The coincidence pulses are applied to thereset and output pulse circuit which provides output pulses having avoltage wave ,Reset pulses are also derived from this circuit and arecoupled to separate reset circuits 91, 92 which are respectivelyassociated with the binary counter 20 and the energy storage stepcounter 50. Each of these reset circuits functions to restore itsassociated counter to-a zero count position. In other words, the binarycounter 20 is triggered to its start position and the energy storagecapacitor 52 is discharged. It can readily be seen that the outputpulses j have the Vdesired subrnultiple frequency.

While the invention has been described as a frequency divider, itfunctions in a similar manner as a predetermined counter. Thus, with theselector switch and adjustable biases set in the 5 position, a controlor output pulse is derived after a count of iive. Y

Although, by way of example, only two counter stages have been shown,the invention is not so limited. For

example, a multistage bi-quinary counter can be devisedV by cascading aplurality of binary and step-of-five energy storage counters; or,further fractional subdivision is possible in the system shown in theabove-identified patentV to Luck et al. if the ten-step energy storagecounter stages are separated by binary counters in the manner herebeforedescribed. A V

The limiter stages, reset circuits and resetand output pulse lcircuithave not been described with particularity lbecause such are well known.A more detailed explanation fof `all but thenirst limiter circuit may befound in the patent to Luck et yal. The first limiter is shown Vashaving two ttri'ode stages, each Vof which functions asa grid limiter toclip half :of the input sinusoid. This could be replaced byany suitablelimiter suchV as is described in the above indicated book byrReioh onparent that the invention provides a simple, `stable frequency divideror predetermined counter of the energy storage step counter type whichhas a broad counting or frequency dividing range.

What is claimed is:

l. A frequency divider comprising, in combination, a bistable typecounter having an input and an output, Iand an energy storage counterhaving an input and an output, means to apply pulses `at la requency tobe divided to said bistable .type counter input, means coupling saidbistable type counter output to said energy storage counter input,ladjustable means coupled to said Abistable type counter and rto saidenergy storage counter outputs to detect the larrival of each at apredetermined count and means .to restore said bistable type counter'and said energy storage counter ito a starting condition responsive tosaid detecting means.

2. A frequency divider comprising a ybistable type counter and an energystorage counter, means for applying |a series of pulses to said bistabletype counter having a rst frequency, said bistable type counter beingresponsive to alternate ones of said series to produce an output pulseseries having ia frequency equal to one half of said rst frequency,means coupling the output of said bistable type counter to the input ofsaid energy storage counter, said energy storage counter including `astorage capacitor that is charged up in steps in response to theapplication of said series of output pulses, :adjustable means coupledto said bistable type counter ,and tto said energy storage counter todetect the arrival of each of said counters at a predetermined count,means responsive to a coincidence in detection by said detecting meansIto generate a reset and an output pulse, and means for applying saidreset pulse to each of said counters to reset them to their initialposition.

3. A yfrequency divider as recited in claim 1 wherein said adjustabledetecting means includes 1a first and a second electron discharge tubeeach having atleast a cathode an anode, and a control grid, said rsttube having its grid coupled to the output of said bistable type counterand said second tube having its grid coupled Ito said storage capacitor,separate adjustable bias means for each of said tubes coupled to thecathodes of said tubes, said bias for said iirst tube being adjustableto maintain said rst tube substantially nonconductive until the storagereceived from said bistable type counter and said bias for said secondtube being adjustable .to maintain said second tube substantiallynonconductive until the storage capacitor is charged up by theapplication of la predetermined riumber of pulses; and wherein saidadjustable means to detect =a predetermined count includes meansresponsive to the conduction in said rst and second tubes.

4. A frequency divider as recited in claim 1 wherein said bistable typecounter includes la. pair of electron discharge tubes each having atleast a cathode, an anode, and a control grid, said tubes beingconnected to have energizing potential applied to their anodes throughseparate resistors, the zanode of each tube being cross-conriected tothe grid of the other tube such lthat current conduction is stablethrough either one of said pair of tubes.

5. A predetermined counter comprising va binary counter and an energystorage step counter, said binary counter including a iirst and a secondelectron discharge tube each having at least a cathode, an anode, yand acontrol grid, a coupling between the anode of each tube and the grid ofthe other such that current conduction is stable through either one ofsaid tubes, said energy storage step counter including a storagecapacitor that is charged up in steps in response to Ka series ofpulses, means for applying Ia series of pulses to the grid of said rsttube, means for deriving a second series of pulses having one half thenumber of pulses of said irst series from the anode of said second tube,means coupling said second pulse series deriving means to said energystorage step counter, adjustable means coupled to said binary counterand -to said energy storage step counter for detecting the arrival ofeach Lat a predetermined count, said detecting means including lirst andsecond pairs of electron discharge tubes each having la rst yand 'asecond tube, each tube having at least a cathode, `an anode, and acontrol grid, la separate cathode bias resistor for each pair of tubeshaving one end t-o which the cathodes of each tube in 'a pair isconnected, a iirst adjustable bias means for each pair of tubesconnected to .the other end of :an `associated one of said cathode biasresistors, a coupling between the grid of the first tube of the rst pair`and the output of said scaleeoftwo counter, a iixed bias connected :tothe grid :of Athe second tube of the rst pair, a second yadjustable biasmeans connected to the grid `of the -rst .tube of said second pair, aconnection between the grid of the second tube of said second pair :andsaid storage capacitor, means responsive to Ea coincidence in detectionby said detecting means rto generate `a reset `and an output pulse, andmeans to apply said reset pulse to each iof said counters to reset themto their initial position.

6. A predetermined counter as recited in claim 5 wherein .said energy`storage counter includes a blocking oscillator comprising an electrondischarge tube having anode, cathode, and grid electrodes, a cathodefollower tube having anode, cathode and grid electrodes, a cathode biasresistor, said blocking oscillator cathode and said cathode followertube cathode being connected together and to said cathode bias resistor,and means to apply a bias to said cathode follower grid to compensatethe threshold bias applied to 4said blocking oscillator for variationsin anode supply voltage.

7. A frequency divider comprising, in combination, a bistable typecounter having yan input 'and an output, |and an energy storage counterhaving an input and an output, said energy storage counter including astorage capacitor that is charged up in steps in response to a sexies ofpulses, means to apply a -iirst series of pulses at a frequency to bedivided to said bistable type counter input, means for deriving a secondseries of pulses having one half the number of pulses of said rst seriesfrom said bistable type counter, means coupling said bistable typecounter output to said energy storage counter input, adjustable meanscoupled to said bistable type counter and to said energy storage counteroutputs to detect the arrival of each at -a predetermined count, meansto restore `said Ibistable type counter and said energy storage counterto a starting condition responsive to said detecting means, saidadjustable means coupled to said counters including a tirst and Iasecond pair of electron discharge tubes each having =a rst and a secondtube, each tube in said pairs having at least -a cathode, an anode, anda control grid, a separate cathode bias resistor for each pair of tubeshaving one end to which the cathodes :of each tube in la pair isconnected, a rst adjustable bias means for each pair of tubes connectedto the other end of fan associated one of said cathode bias resistors,la coupling between the grid of .the rst tube of the first pair and theoutput of said bistable type scale-of-two counter, a fixed biasconnected to the grid of Ithe second tube of the nrst pair, la secondadjustable bias means connected to the grid of the rst tube of saidsecond pair, and a connection between the grid of the second tube ofsaid second pair and said storage capacitor.

References Cited in the tle of this patent UNITED STATES PATENTS2,420,516 Bischoff May 13, 1947 2,472,774 M-ayle .Tune 7, 1949 2,474,266Lyons June 28, 1949 2,521,774 Bliss Sept. 12, 1950 2,562,694 Brown July31, 1951 2,563,123 Luck et al. Aug. 7, 1951 2,709,770 Hansen May 31,1955

